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Section 2 CPU
Bus-released state
Exception-handling state
RES = high
Reset state
From any state except hardware standby mode, a transition to the reset state occurs whenever RES
Notes: 1.
goes low. A transition can also be made to the reset state when the watchdog timer overflows.
From any state, a transition to hardware standby mode occurs when STBY goes low.
2.
Rev. 1.00 Mar. 12, 2008 Page 58 of 1178
REJ09B0403-0100
End of bus request
Program execution
End of bus
request
Bus
request
Request for
End of
exception
exception
handling
handling
External interrupt
request
STBY = High, RES = Low
*1
Figure 2.13 State Transitions
Bus request
state
SLEEP
instruction
with
SLEEP
SSBY = 0
instruction
with
PSS = 0 and
SSBY = 1
Interrupt
request
Hardware standby mode
Sleep mode
Software standby mode
*2
Power-down state
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