Advertisement
Figure 21.4 Sample Transmission Flowchart ............................................................................. 827
Figure 21.5 Sample Reception Flowchart................................................................................... 829
Figure 21.6 E-DMAC Operation after Transmit Error ............................................................... 830
Figure 21.7 E-DMAC Operation after Receive Error................................................................. 831
Section 22 Ethernet Controller (EtherC)
Figure 22.1 Block Diagram of USB ........................................................................................... 834
Figure 22.2 Operation at Cable Connection ............................................................................... 865
Figure 22.3 Operation at Cable Disconnection........................................................................... 866
Figure 22.4 Suspend Operation .................................................................................................. 867
Figure 22.5 Resume Operation from Up-Stream ........................................................................ 868
Figure 22.6 Flow of Transition to and Canceling Software Standby Mode................................ 869
Figure 22.7 Timing of Transition to and Canceling Software Standby Mode ............................ 870
Figure 22.8 Remote-Wakeup...................................................................................................... 871
Figure 22.9 Transfer Stages in Control Transfer ........................................................................ 872
Figure 22.10 Setup Stage Operation ........................................................................................... 873
Figure 22.11 Data Stage (Control-In) Operation ........................................................................ 874
Figure 22.12 Data Stage (Control-Out) Operation...................................................................... 875
Figure 22.13 Status Stage (Control-In) Operation ...................................................................... 876
Figure 22.14 Status Stage (Control-Out) Operation ................................................................... 877
Figure 22.15 EP1 Bulk-Out Transfer Operation......................................................................... 878
Figure 22.16 EP2 Bulk-In Transfer Operation............................................................................ 879
Figure 22.17 Operation of EP3 Interrupt-In Transfer ................................................................. 881
Figure 22.18 Forcible Stall by Application................................................................................. 884
Figure 22.19 Automatic Stall by USB Function Module............................................................ 885
Figure 22.20 RDFN Bit Operation for EP1 ................................................................................ 887
Figure 22.21 PKTE Bit Operation for EP2................................................................................. 888
Figure 22.22 Example of Circuitry in Self-Powered Mode ........................................................ 891
Figure 22.23 TR Interrupt Flag Set Timing ................................................................................ 893
Section 23 A/D Converter
Figure 23.1 Block Diagram of the A/D Converter...................................................................... 896
Figure 23.2 Example of A/D Converter Operation
(When Channel 1 is Selected in Single Mode)........................................................ 903
Figure 23.3 Example of A/D Converter Operation
(When Channels AN0 to AN3 are Selected in Scan Mode).................................... 904
Figure 23.4 A/D Conversion Timing .......................................................................................... 906
Figure 23.5 Timing of External Trigger Input ............................................................................ 908
Figure 23.6 A/D Conversion Accuracy Definitions.................................................................... 910
Figure 23.7 A/D Conversion Accuracy Definitions.................................................................... 910
Figure 23.8 Example of Analog Input Circuit ............................................................................ 911
Rev. 1.00 Mar. 12, 2008 Page xxxvii of xIviii
Advertisement
