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Renesas H8S Family Hardware Manual page 618

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Section 17 Synchronous Serial Communication Unit (SSU)
(1) When 8-bit data length is selected (SSTDR0 is valid) with CPOS = 0 and CPHS = 0
SCS
SSCK
SSO
TDRE
TEND
LSI operation
User operation
(2) When 16-bit data length is selected (SSTDR0 and SSTDR1 are valid) with CPOS = 0 and CPHS = 0
SCS
SSCK
SSO
(LSB first)
SSO
(MSB first)
TDRE
TEND
LSI operation
User operation
(3) When 32-bit data length is selected (SSTDR0, SSTDR1, SSTDR2, and SSTDR3 are valid)
with CPOS = 0 and CPHS = 0
SCS
SSCK
SSO
(LSB first)
SSO
(MSB first)
TDRE
TEND
LSI operation
User operation
Figure 17.5 Example of Transmission Operation (SSU Mode)
Rev. 1.00 Mar. 12, 2008 Page 570 of 1178
REJ09B0403-0100
1 frame
Bit
Bit
Bit
Bit
Bit
Bit
0
1
2
3
4
5
SSTDR0
(LSB first transmission)
TXI interrupt
TEI interrupt
generated
Data written to SSTDR0
Bit
Bit
Bit
Bit
Bit
Bit
0
1
2
3
4
5
SSTDR1
Bit
Bit
Bit
Bit
Bit
Bit
7
6
5
4
3
2
SSTDR0
Data written to SSTDR0 and SSTDR1
1 frame
Bit
Bit
Bit
Bit
to
to
0
7
0
7
SSTDR3
SSTDR2
Bit
Bit
Bit
Bit
to
to
7
0
7
0
SSTDR0
SSTDR1
TXI interrupt generated TEI interrupt generated
Data written to SSTDR0, SSTDR1, SSTDR2, and SSTDR3
1 frame
Bit
Bit
Bit
Bit
Bit
6
7
7
6
5
SSTDR0
(MSB first transmission)
TXI interrupt
generated
generated
Data written to SSTDR0
1 frame
Bit
Bit
Bit
Bit
Bit
Bit
Bit
6
7
0
1
2
3
4
SSTDR0
Bit
Bit
Bit
Bit
Bit
Bit
Bit
1
0
7
6
5
4
3
SSTDR1
TXI interrupt generated
Bit
Bit
Bit
Bit
to
to
0
7
0
7
SSTDR1
SSTDR0
Bit
Bit
Bit
Bit
to
to
7
0
7
0
SSTDR2
SSTDR3
Bit
Bit
Bit
Bit
Bit
4
3
2
1
0
TEI interrupt
generated
Bit
Bit
Bit
5
6
7
Bit
Bit
Bit
2
1
0
TEI interrupt generated

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