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Renesas H8S Family Hardware Manual page 44

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Table 13.9
Maximum Bit Rate for Each Frequency
(Smart Card Interface Mode, S = 372) ................................................................. 448
Table 13.10
Serial Transfer Formats (Asynchronous Mode)................................................ 450
Table 13.11
SSR Status Flags and Receive Data Handling .................................................. 457
Table 13.12
SCI Interrupt Sources........................................................................................ 487
Table 13.13
SCI Interrupt Sources........................................................................................ 488
Section 15 Serial Communication Interface with FIFO (SCIF)
Table 15.1
Pin Configuration.................................................................................................. 507
Table 15.2
Register Access..................................................................................................... 508
Table 15.3
Interrupt Control Function .................................................................................... 513
Table 15.4
SCIF Output Setting ............................................................................................. 525
Table 15.5
Example of Baud Rate Settings ............................................................................ 526
Table 15.6
Correspondence Between LPC Interface I/O Address and the SCIF Registers .... 537
Table 15.7
Register States ...................................................................................................... 538
Table 15.8
Interrupt Sources................................................................................................... 539
Table 15.9
Interrupt Source, Vector Address, and Interrupt Priority...................................... 539
Section 16 Serial Pin Multiplexed Modes
Table 16.1
Pin Configuration.................................................................................................. 542
Section 17 Synchronous Serial Communication Unit (SSU)
Table 17.1
Pin Configuration.................................................................................................. 553
Table 17.2
Communication Modes and Pin States of SSI and SSO Pins ............................... 566
Table 17.3
Communication Modes and Pin States of SSCK Pin............................................ 567
Communication Modes and Pin States of SCS Pin............................................... 567
Table 17.4
Table 17.5
Interrupt Sources................................................................................................... 583
2
Section 18 I
C Bus Interface (IIC)
Table 18.1
Pin Configuration.................................................................................................. 588
Table 18.2
Transfer Format .................................................................................................... 592
2
Table 18.3
I
C bus Transfer Rate (1) ...................................................................................... 596
2
Table 18.3
I
C bus Transfer Rate (2) ...................................................................................... 597
Table 18.4
Flags and Transfer States (Master Mode) ............................................................. 604
Table 18.5
Flags and Transfer States (Slave Mode) ............................................................... 605
Table 18.6
Output Data Hold Time ........................................................................................ 616
Table 18.7
ISCMBCR Setting ................................................................................................ 616
2
Table 18.8
I
C Bus Data Format Symbols.............................................................................. 618
Table 18.9
Examples of Operation Using the DTC ................................................................ 647
Table 18.10
IIC Interrupt Source .......................................................................................... 650
2
Table 18.11
I
C Bus Timing (SCL and SDA Outputs)......................................................... 651
Table 18.12
Permissible SCL Rise Time (t
Rev. 1.00 Mar. 12, 2008 Page xliv of xIviii
) Values ........................................................... 652
sr

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