Renesas H8S Family Hardware Manual page 397

• PE4/LFRAME
The pin function is switched as shown below according to whether the LPC is enabled or
disabled and the PE4DDR bit.
LPC
PE4DDR
Pin function
[Legend] X: Don't care.
• PE3/LAD3
The pin function is switched as shown below according to whether the LPC is enabled or
disabled and the PE3DDR bit.
LPC
PE3DDR
Pin function
[Legend] X: Don't care.
• PE2/LAD2
The pin function is switched as shown below according to whether the LPC is enabled or
disabled and the PE2DDR bit.
LPC
PE2DDR
Pin function
[Legend] X: Don't care.
• PE1/LAD1
The pin function is switched as shown below according to whether the LPC is enabled or
disabled and the PE1DDR bit.
LPC
PE1DDR
Pin function
[Legend] X: Don't care.
Disabled
0
PE4 input pin
Disabled
0
PE3 input pin
Disabled
0
PE2 input pin
Disabled
0
PE1 input pin
1
PE4 output pin
1
PE3 output pin
1
PE2 output pin
1
PE1 output pin
Rev. 1.00 Mar. 12, 2008 Page 349 of 1178
Section 8 I/O Ports
Enabled
X
LFRAME input pin
Enabled
X
LAD3 input/output pin
Enabled
X
LAD2 input/output pin
Enabled
X
LAD1 input/output pin
REJ09B0403-0100