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TCNT value
H'FF
H'00
WT/IT = 1
TME = 1
Internal reset signal
Timer mode select bit
WT/IT:
Timer enable bit
TME:
Overflow flag
OVF:
Note: * After the OVF bit becomes 1, it is cleared to 0 by an internal reset.
The XRST bit is also cleared to 0.
Figure 12.2 Watchdog Timer Mode (RST/NMI = 1) Operation
Overflow
OVF = 1*
Write H'00 to
TCNT
518 system clocks
Section 12 Watchdog Timer (WDT)
WT/IT = 1
Write H'00 to
TME = 1
TCNT
Rev. 1.00 Mar. 12, 2008 Page 421 of 1178
Time
REJ09B0403-0100
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