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Table 31.8
Bus Timing ......................................................................................................... 1134
Table 31.9
Multiplex Bus Timing......................................................................................... 1143
Table 31.10
Timing of On-Chip Peripheral Modules ......................................................... 1146
Table 31.11
Timing of On-Chip Peripheral Modules (2).................................................... 1147
2
Table 31.12
I
C Bus Timing ............................................................................................... 1152
Table 31.13
LPC Module Timing ....................................................................................... 1153
Table 31.14
Ethernet Controller Signal Timing.................................................................. 1155
Table 31.15
USB Characteristics when On-Chip USB Transceiver is Used
(USD+, USD− pin characteristics).................................................................. 1158
Table 31.16
JTAG Timing.................................................................................................. 1160
Table 31.17
A/D Conversion Characteristics
(AN7 to AN0 Input: 80/160-State Conversion).............................................. 1162
Table 31.18
Flash Memory Characteristics ........................................................................ 1163
Appendix
Table A.1
I/O Port States in Each Processing State............................................................. 1165
Rev. 1.00 Mar. 12, 2008 Page xlvii of xIviii
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