Renesas H8S Family Hardware Manual page 573

Table 15.4 SCIF Output Setting
Bit SCIFE in
HICR5
SCIFOE1
SCIFOE0 0
P65 pin PORT
P27 pin PORT
P50 pin PORT
Note: P51, P24 to P26, and P64 are input to the SCIF even when the outputs on the P27, P50,
and P65 pins are set to PORT.
Section 15 Serial Communication Interface with FIFO (SCIF)
0
0 1
1 0
RTS
PORT
DTR
PORT
PORT TxDF
0
1 0 1
RTS
PORT PORT
DTR
PORT PORT
TxDF TxDF TxDF
Rev. 1.00 Mar. 12, 2008 Page 525 of 1178
1
1
0 1
RTS
PORT
DTR
PORT
TxDF TxDF
REJ09B0403-0100