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Section 19 LPC Interface (LPC)
Initial
Bit
Bit Name
Value
4
BEVT_ATN 0
3
B2H_ATN
0
2
H2B_ATN
0
Rev. 1.00 Mar. 12, 2008 Page 728 of 1178
REJ09B0403-0100
R/W
Slave
Host
Description
1
5
R/(W)*
R/(W)*
Event Interrupt
Sets when the slave detects an event to the host.
Setting the B2H_IRQ_EN bit in the BTIMSR
register enables the BEVT_ATN bit to be used as
an interrupt source to the host.
0: No event interrupt request is available
[Clearing condition]
When the host writes a 1 to the bit.
1: An event interrupt request is available
[Setting condition]
When the slave writes a 1 after a 0 has been read
from BEVT_ATN.
1
5
R/(W)*
R/(W)*
Slave Buffer Write End Indication Flag
This status flag indicates that the slave has
finished writing all data to the BTDTR buffer.
Setting the B2H_IRQ_EN bit in the BTIMSR
register enables the B2H_ATN bit to be used as
an interrupt source to the host.
0: Host has completed reading the BTDTR buffer
[Clearing condition]
When the host writes a 1
1: Slave has completed writing to the BTDTR
buffer
[Setting condition]
When the slave writes a 1 after a 0 has been read
from B2N_ATN.
2
1
R/(W)*
R/(W)*
Host Buffer Write End Indication Flag
This status flag indicates that the host has finished
writing all data to the BTDTR buffer.
0: Slave has completed reading the BTDTR buffer
[Clearing condition]
When the slave writes a 0 after a 1 has been read
from H2B_ATN.
1: Host has completed writing to the BTDTR buffer
[Setting condition]
When the host writes a 1
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