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Section 22 USB Function Module (USB)
When performing bulk-in transfer, as there is no valid data in the FIFOs on reception of the first
IN token, an EP2TR bit interrupt in IFR0 is requested. With this interrupt, 1 is written to the
EP2EMPTY bit in IER0, and the EP2 FIFO empty interrupt is enabled. At first, both EP2 FIFOs
are empty, and so an EP2 FIFO empty interrupt is generated immediately.
The data to be transmitted is written to the data register using this interrupt. After the first transmit
data write for one FIFO, the other FIFO is empty, and so the next transmit data can be written to
the other FIFO immediately. When both FIFOs are full, EP2 EMPTY is cleared to 0. If at least one
FIFO is empty, the EP2EMPTY bit in IFR0 is set to 1. When ACK is returned from the host after
data transmission is completed, the FIFO used in the data transmission becomes empty. If the
other FIFO contains valid transmit data at this time, transmission can be continued.
When transmission of all data has been completed, write 0 to the EP2EMPTY bit in IER0 and
disable interrupt requests.
Rev. 1.00 Mar. 12, 2008 Page 880 of 1178
REJ09B0403-0100
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