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Renesas H8S Family Hardware Manual page 686

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2
Section 18 I
C Bus Interface (IIC)
Receive operations can be performed continuously by repeating steps 9 to 13.
14. Confirm that the ICDRF flag is set to 1, and read ICDR.
15. Clear the IRIC flag.
Start condition issuance
SCL
(master output)
SDA
(master output)
SDA
(slave output)
IRIC
ICDRF
ICDRS
ICDRR
User processing
Figure 18.21 Slave Receive Mode Operation Timing Example (1)
Rev. 1.00 Mar. 12, 2008 Page 638 of 1178
REJ09B0403-0100
1
2
3
4
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Slave address
Address+R/W
(MLS = ACKB = 0, HNDS = 0)
5
6
7
8
9
Bit 2
Bit 1
Bit 0
R/W
1
2
3
4
Bit 7
Bit 6
Bit 5
Bit 4
[6]
Data 1
A
Data 1
[7]
Address+R/W
[8] IRIC clear
[10] ICDR read

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