Modem Status Register (Fmsr) - Renesas H8S Family Hardware Manual

Section 15 Serial Communication Interface with FIFO (SCIF)

15.3.12 Modem Status Register (FMSR)

FMSR is a read-only register that indicates the status of or a change in the modem control pins.
Bit Bit Name
7 DCD
6 RI
5 DSR
4 CTS
3 DDCD
2 TERI
Rev. 1.00 Mar. 12, 2008 Page 522 of 1178
REJ09B0403-0100
Initial Value R/W
0 R
0 R
0 R
0 R
0 R
0 R
Description
Data Carrier Detect
Indicates the inverted state of the DCD input pin.
Ring Indicator
Indicates the inverted state of the RI input pin.
Data Set Ready
Indicates the inverted state of the DSR input pin.
Clear to Send
Indicates the inverted state of the CTS input pin.
Delta Data Carrier Indicator
Indicates a change in the DCD input signal after the
DDCD bit is read.
0: No change in the DCD input signal after FMSR
read
[Clearing condition]
FMSR read
1: A change in the DCD input signal after FMSR read
[Setting condition]
A change in the DCD input signal
Trailing Edge Ring Indicator
Indicates a rise in the RI input signal after the TERI
bit is read.
0: No change in the RI input signal after FMSR read
[Clearing condition]
FMSR read
1: A rise in the RI input signal after FMSR read
[Setting condition]
A rise in the RI input pin