Renesas H8S Family Hardware Manual page 312

Section 8 I/O Ports
• PE6/LCLK
The pin function is switched as shown below according to whether the LPC is enabled or
disabled and the PE6DDR bit.
LPC
PE6DDR
Pin function
[Legend] X: Don't care.
• PE5/LRESET
The pin function is switched as shown below according to whether the LPC is enabled or
disabled and the PE5DDR bit.
LPC
PE5DDR
Pin function
[Legend] X: Don't care.
• PE4/LFRAME
The pin function is switched as shown below according to whether the LPC is enabled or
disabled and the PE4DDR bit.
LPC
PE4DDR
Pin function
[Legend] X: Don't care.
• PE3/LAD3
The pin function is switched as shown below according to whether the LPC is enabled or
disabled and the PE3DDR bit.
LPC
PE3DDR
Pin function
[Legend] X: Don't care.
Rev. 1.00 Mar. 12, 2008 Page 264 of 1178
REJ09B0403-0100
Disabled
0
PE6 input pin
Disabled
0
PE5 input pin
Disabled
0
PE4 input pin
Disabled
0
PE3 input pin
1
PE6 output pin
1
PE5 output pin
1
PE4 output pin
1
PE3 output pin
Enabled
X
LCLK input pin
Enabled
X
LRESET input pin
Enabled
X
LFRAME input pin
Enabled
X
LAD3 input/output pin