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Section 3 MCU Operating Modes
3.3
Operating Mode Descriptions
3.3.1
Mode 2
The CPU can access a 16 Mbytes address space in advanced mode. The on-chip ROM is enabled.
After a reset, the LSI is set to single-chip mode. To access an external address space, bit EXPE in
MDCR should be set to 1.
• Normal extended mode
In extended mode, ports 1, 2 (P23 to P20), and 4 (P47 to P44) function as input ports after a
reset.
Ports 1 and 2 function as an address bus by setting 1 to the corresponding port data direction
register (DDR). Port 3 functions as a data bus port, and parts of port 9 and port C carry bus
control signals. Ports 4 (P43 to P40) and 6 (P63 to P60) function as a data bus port when the
ABW bit in WSCR is cleared to 0.
• Multiplex extended mode
When 8-bit bus is specified, port 1 functions as the port for address output and data
input/output regardless of the setting of the data direction register (DDR). Ports 2 (P23 to P20)
and 4 (P47 to P44) can be used as a general port.
When 16-bit bus is specified, ports 1, 2 (P23 to P20), and 4 (P47 to P44) function as the port
for address output and data input/output regardless of the setting of the data direction register
(DDR).
Rev. 1.00 Mar. 12, 2008 Page 66 of 1178
REJ09B0403-0100
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