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Initial
Bit
Bit Name
Value
2
PMEE
0
1
LSMIE
0
R/W
Slave Host Description
R/W
PME Output Enable
Controls PME output in combination with the PMEB bit
in HICR1. PME pin output is open-drain, and an
external pull-up resistor (Vcc) is needed. The PD2DDR
bit should be cleared to 0 when the LPC is used.
PMEE
0
1
1
R/W
LSMI output Enable
Controls LSMI output in combination with the LSMIB
bit in HICR1. LSMI pin output is open-drain, and an
external pull-up resistor (Vcc) is needed. The PD1DDR
bit should be cleared to 0 when the LPC is used.
LSMIE
0
1
1
Section 19 LPC Interface (LPC)
PMEB
X
: PME output disabled; general I/O
function of pin PD2 is enabled
: PME output enabled, PME pin
0
output goes to 0 level
: PME output enabled, PME pin
1
output is high-impedance
LSMIB
X
: LSMI output disabled; general I/O
function of pin PD1 is enabled
0
: LSMI output enabled, LSMI pin
output goes to 0 level
1
: LSMI output enabled, LSMI pin
output is Hi-Z
Rev. 1.00 Mar. 12, 2008 Page 673 of 1178
REJ09B0403-0100
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