Advertisement
Table 5.9
Interrupt Source Selection and Clearing Control .................................................. 101
Section 6 Bus Controller (BSC)
Table 6.1
Pin Configuration.................................................................................................. 108
Table 6.2
Address Ranges and External Address Spaces ..................................................... 117
Table 6.3
Bit Settings and Bus Specifications of Basic Bus Interface.................................. 118
Table 6.4
Bus Specifications for Basic Extended Area/Basic Bus Interface ........................ 118
Table 6.5
Bus Specifications for 256-Kbyte Extended Area/Basic Bus Interface ................ 119
Table 6.6
Address-Data Multiplex Address Spaces.............................................................. 121
Table 6.7
Bit Settings and Bus Specifications of Basic Bus Interface.................................. 122
Table 6.8
Bus Specifications for IOS Extended Area/Multiplex Bus Interface
(Address Cycle) .................................................................................................... 122
Table 6.9
Bus Specifications for IOS Extended Area/Multiplex Bus Interface
(Data Cycle) ......................................................................................................... 122
Table 6.10
Bus Specifications for 256-Kbyte Extended Area/Multiplex Bus Interface
(Address Cycle).................................................................................................... 123
Table 6.11
Bus Specifications for 256-Kbyte Extended Area/Multiplex Bus Interface
(Data Cycle) ......................................................................................................... 123
Address Range for IOS Signal Output.................................................................. 124
Table 6.12
Table 6.13
Data Buses Used and Valid Strobes...................................................................... 127
Table 6.14
Data Buses Used and Valid Strobes (Gluless Extension) ..................................... 128
Table 6.15
Pin States in Idle Cycle......................................................................................... 155
Section 7 Data Transfer Controller (DTC)
Table 7.1
Correspondence between Interrupt Sources and DTCER ..................................... 165
Table 7.2
DTC Event Counter Conditions............................................................................ 169
Table 7.3
Flag Status/Address Code..................................................................................... 170
Table 7.4
Interrupt Sources, DTC Vector Addresses, and Corresponding DTCEs .............. 174
Table 7.5
Register Functions in Normal Mode..................................................................... 176
Table 7.6
Register Functions in Repeat Mode...................................................................... 177
Table 7.7
Register Functions in Block Transfer Mode ......................................................... 178
Table 7.8
DTC Execution Status .......................................................................................... 182
Table 7.9
Number of States Required for Each Execution Status ........................................ 182
Section 8 I/O Ports
Table 8.1
Port Functions....................................................................................................... 188
Table 8.2
Port 1 Input Pull-Up MOS States.......................................................................... 194
Table 8.3
Port 2 Input Pull-Up MOS States.......................................................................... 199
Table 8.4
Port 3 Input Pull-Up MOS States.......................................................................... 205
Table 8.5
Port 4 Input Pull-Up MOS States.......................................................................... 213
Table 8.6
Port 6 Input Pull-Up MOS States.......................................................................... 224
Table 8.7
Input Pull-Up MOS States .................................................................................... 245
Rev. 1.00 Mar. 12, 2008 Page xlii of xIviii
Advertisement
