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Section 6 Bus Controller (BSC)
(2)
16-Bit Access Space
Figure 6.4 illustrates data alignment control for the 16-bit access space. With the 16-bit access
space, the upper data bus (D15 to D8/AD15 to AD8) and lower data bus (D7 to D0/AD7 to AD0)
are used for accesses. The amount of data that can be accessed at one time is one byte or one word,
and a longword access is executed as two word accesses.
In byte access, whether the upper or lower data bus is used is determined by whether the address is
even or odd. The upper data bus is used for even addresses, and the lower data bus for odd
addresses.
Byte size
Byte size
Word size
Longword
size
Figure 6.4 Access Sizes and Data Alignment Control (16-bit Access Space)
Rev. 1.00 Mar. 12, 2008 Page 126 of 1178
REJ09B0403-0100
· Even address
· Odd address
1st bus cycle
2nd bus cycle
Upper data bus
Lower data bus
D15
D8 D7
15
8
7
15
8
7
31
24
23
15
8
7
D0
0
0
16
0
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