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14.2.2
CRC Data Input Register (CRCDIR)
CRCDIR is an 8-bit readable/writable register, to which the bytes to be CRC-operated are written.
The result is obtained in CRCDOR.
14.2.3
CRC Data Output Register (CRCDOR)
CRCDOR is a 16-bit readable/writable register that contains the result of CRC operation when the
bytes to be CRC-operated are written to CRCDIR after CRCDOR is cleared. When the CRC
operation result is additionally written to the bytes to which CRC operation is to be performed, the
CRC operation result will be H'0000 if the data contains no CRC error. When bits 1 and 0 in
CRCCR are set to G1 = 0 and G0 = 1, respectively, the lower byte of this register contains the
result.
14.3
CRC Operation Circuit Operation
The CRC operation circuit generates a CRC code for LSB-first/MSB-first communications. An
example in which a CRC code for hexadecimal data H'F0 is generated using the X
polynomial with the G1 and G0 bits in CRCCR set to B'11 is shown below.
1. Write H'83 to CRCCR
7
CRCCR
1
0
0
7
0
0
0
CRCDORH
CRCDORL
0
0
0
3. Read from CRCDOR
CRC code = H'F78F
4. Serial transmission (LSB first)
7
1
1
1
1
0
F
0
0
0
0
1
1
CRCDOR clearing
0
0
0
0
0
0
0
0
0
0
0
CRC code
0
7
1
1
1
1
0
0
0
7
8
Figure 14.2 LSB-First Data Transmission
Section 14 CRC Operation Circuit (CRC)
2. Write H'F0 to CRCDIR
7
CRCDIR
1
1
1
7
1
1
1
CRCDORH
CRCDORL
1
0
0
0
7
1
1
1
1
1
1
1
F
F
Rev. 1.00 Mar. 12, 2008 Page 499 of 1178
16
12
+ X
+ X
0
1
0
0
0
0
CRC code generation
0
1
0
1
1
1
0
1
1
1
1
Data
0
1
0
0
0
0
0
REJ09B0403-0100
5
+ 1
Output
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