Operation - Renesas H8S Family Hardware Manual

Section 23 A/D Converter

23.4

The A/D converter operates by successive approximation with 10-bit resolution. It has two

operating modes: single mode and scan mode. When changing the operating mode or analog input

channel, to prevent incorrect operation, first clear the ADST bit to 0 in ADCSR to halt A/D

conversion. The ADST bit can be set to 1 at the same time as the operating mode or analog input

channel is changed.

In single mode, A/D conversion is performed only once on the specified single channel.

Operations are as follows.

1. A/D conversion on the specified channel is started when the ADST bit in ADCSR is set to 1,

by software or by the input of trigger signal.

2. When A/D conversion is completed, the result is transferred to the A/D data register

corresponding to the channel.

3. On completion of A/D conversion, the ADF bit in ADCSR is set to 1. If the ADIE bit is set to

1 at this time, an ADI interrupt request is generated.

4. The ADST bit remains set to 1 during A/D conversion. When conversion ends, the ADST bit

is automatically cleared to 0, and the A/D converter enters the idle state. If the ADST bit is

cleared during A/D conversion, the A/D converter stops conversion and enters the idle state.

Rev. 1.00 Mar. 12, 2008 Page 902 of 1178

REJ09B0403-0100