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Section 6 Bus Controller (BSC)
(2)
In Address-Data Multiplex Extended Mode
(a)
Program Wait Mode
Program wait mode includes address wait and data wait.
• 256-Kbyte extended area and IOS extended area
Zero or one state of address wait T
of data wait T
DSW
(b)
Pin Wait Mode
When accessing the external address space, a specified number of wait states T
between the T
state and T
4
settings of the WC1 and WC0 bits. If the WAIT pin is low at the falling edge of φ in the last T
T
, or T
state, another T
DSW
DOW
inserted until it goes high.
Pin wait mode is useful when inserting four or more T
T
states to be inserted for each external device.
DOW
(c)
Pin Auto-Wait Mode
A specified number of wait states T
accessing the external address space if the WAIT pin is low at the falling edge of φ in the last T
state. The number of wait states T
if the WAIT pin is held low, T
Pin auto-wait mode enables the low-speed memory interface only by inputting the chip select
signal to the WAIT pin.
Figure 6.29 shows an example of wait state insertion timing in pin wait mode.
Rev. 1.00 Mar. 12, 2008 Page 150 of 1178
REJ09B0403-0100
is inserted between T
AW
is inserted between T
state of data state. The number of wait states T
5
state is inserted. If the WAIT pin is held low, T
DOW
are inserted between the T
DOW
is specified by the settings of the WC1 and WC0 bits. Even
DOW
states are inserted only up to the specified number of states.
DOW
1
and T
states.
4
5
states, or when changing the number of
DOW
and T
states. Zero to three states
2
can be inserted
DSW
is specified by the
DSW
states are
DOW
state and T
state when
4
5
,
4
4
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