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Bit
Bit Name
18
FR
17
RDE
16
RFOF
15 to 12
11
CND
10
DLC
9
CD
Section 21 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Initial
value
R/W
Description
0
R/W
Frame Reception
Indicates that a frame has been received and the
receive descriptor has been updated. This bit is set to
1 each time a frame is received.
0: Frame not received
1: Frame received
0
R/W
Receive Descriptor Empty
When receive descriptor empty (RDE = 1) occurs,
receiving can be restarted by setting RACT = 1 in the
receive descriptor and initiating receiving.
0: Receive descriptor active bit RACT = 1 not
1: Receive descriptor active bit RACT = 0 detected
0
R/W
Receive FIFO Overflow
Indicates that the receive FIFO has overflowed during
frame reception.
0: Overflow has not occurred
1: Overflow has occurred
All 0
R
Reserved
These bits are always read as 0. The initial value
should not be changed.
0
R/W
Carrier Not Detect
Indicates the carrier detection status.
0: A carrier is detected when transmission starts
1: A carrier is not detected when transmission starts
0
R/W
Detect Loss of Carrier
Indicates that loss of the carrier has been detected
during frame transmission.
0: Loss of carrier not detected
1: Loss of carrier detected
0
R/W
Delayed Collision Detect
Indicates that a delayed collision has been detected
during frame transmission.
0: Delayed collision not detected
1: Delayed collision detected
detected
Rev. 1.00 Mar. 12, 2008 Page 801 of 1178
REJ09B0403-0100
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