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8.3.2
Port Control Register 0 (Ptcnt0) ....................................................................... 356
Section 9 14-Bit Pwm Timer (Pwmx) ........................................................... 357
9.1
Features.............................................................................................................................. 357
9.2
Input/Output Pins............................................................................................................... 358
9.3
Register Descriptions......................................................................................................... 358
9.3.1
Pwmx (D/A) Counter (Dacnt) ........................................................................ 359
9.3.2
Pwmx (D/A) Data Registers A And B (Dadra And Dadrb) ......................... 360
9.3.3
Pwmx (D/A) Control Register (Dacr) ............................................................. 362
9.3.4
Peripheral Clock Select Register (Pcsr) ............................................................. 363
9.4
Bus Master Interface.......................................................................................................... 364
9.5
Operation ........................................................................................................................... 365
Section 10 16-Bit Free-Running Timer (Frt).................................................. 373
10.1 Features.............................................................................................................................. 373
10.2 Register Descriptions......................................................................................................... 375
10.2.1 Free-Running Counter (FRC) ............................................................................... 375
10.2.2 Output Compare Registers A and B (OCRA and OCRB) .................................... 375
10.2.3 Output Compare Registers AR and AF (OCRAR and OCRAF) .......................... 376
10.2.4 Timer Interrupt Enable Register (TIER)............................................................... 377
10.2.5 Timer Control/Status Register (TCSR)................................................................. 378
10.2.6 Timer Control Register (TCR).............................................................................. 379
10.2.7 Timer Output Compare Control Register (TOCR) ............................................... 380
10.3 Operation Timing............................................................................................................... 381
10.3.1 FRC Increment Timing......................................................................................... 381
10.3.2 Output Compare Output Timing........................................................................... 381
10.3.3 FRC Clear Timing ................................................................................................ 382
10.3.4 Timing of Output Compare Flag (OCF) Setting ................................................... 382
10.3.5 Timing of FRC Overflow Flag (OVF) Setting...................................................... 383
10.3.6 Automatic Addition Timing.................................................................................. 384
10.4 Interrupt Sources................................................................................................................ 384
10.5 Usage Notes ....................................................................................................................... 385
10.5.1 Conflict between FRC Write and Clear ................................................................ 385
10.5.2 Conflict between FRC Write and Increment......................................................... 386
10.5.3 Conflict between OCR Write and Compare-Match .............................................. 387
10.5.4 Switching of Internal Clock and FRC Operation.................................................. 388
Section 11 8-Bit Timer (Tmr).......................................................................... 391
11.1 Features.............................................................................................................................. 391
11.2 Register Descriptions......................................................................................................... 394
Rev. 1.00 Mar. 12, 2008 Page xiv of xIviii
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