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Bit
Bit Name
3
PER
2
TEND
1
MPB
0
MPBT
Notes: 1. Only 0 can be written to clear the flag.
2. etu: Element Time Unit (time taken to transfer one bit)
Initial
Value
R/W
Description
1
0
R/(W)*
Parity Error
[Setting condition]
When a parity error is detected during reception
[Clearing condition]
When 0 is written to PER after reading PER = 1
1
R
Transmit End
TEND is set to 1 when the receiving end acknowledges no
error signal and the next transmit data is ready to be
transferred to TDR.
[Setting conditions]
•
•
[Clearing conditions]
•
•
0
R
Multiprocessor Bit
Not used in smart card interface mode.
0
R/W
Multiprocessor Bit Transfer
Write 0 to this bit in smart card interface mode.
Section 13 Serial Communication Interface (SCI)
When both TE in SCR and ERS are 0
When ERS = 0 and TDRE = 1 after a specified time
passed after the start of 1-byte data transfer. The set
timing depends on the register setting as follows.
When GM = 0 and BLK = 0, 2.5 etu*
transmission start
When GM = 0 and BLK = 1, 1.5 etu*
transmission start
When GM = 1 and BLK = 0, 1.0 etu*
transmission start
When GM = 1 and BLK = 1, 1.0 etu*
transmission start
When 0 is written to TDRE after reading
TDRE = 1
When a TXI interrupt request is issued allowing DTC
to write the next data to TDR
Rev. 1.00 Mar. 12, 2008 Page 443 of 1178
2
after
2
after
2
after
2
after
REJ09B0403-0100
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