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Section 8 I/O Ports
(b)
Single-Chip Mode (EXPE = 0)
• P27/DTR
The pin function is switched as shown below according to the combination of the SCIFE bit in
HICR5 of the LPC, the SCIFOE1 and SCIFOE0 bits in SCIFCR of the SCIF, and the P27DDR
bit.
SCIFE
SCIFOE1,
SCIFOE0
P27DDR
0
Pin
P27 input
function
pin
[Legend] X: Don't care.
• P26/DSR, P25/RI, P24/DCD
The pin function is switched as shown below according to the P2nDDR bit.
P2nDDR
Pin function
[Legend] n = 6 to 4
• P23 to P20
The pin function is switched as shown below according to the P2nDDR bit.
P2nDDR
Pin function
[Legend] n = 3 to 0
Rev. 1.00 Mar. 12, 2008 Page 198 of 1178
REJ09B0403-0100
0
Other than 10
1
P27 output
pin
P2n input pin
DSR/RI/DCD input pin
P2n input pin
10
X
DTR output
P27 input
pin
pin
0
0
1
X1
0
1
P27 output
pin
1
P2n output pin
1
P2n output pin
X0
X
DTR output
pin
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