Advertisement
Table 18.5 Flags and Transfer States (Slave Mode)
MST
TRS
BBSY
ESTP
0
0
0
0
0
0
1↑
0
0
1↑/0
1
0
1
*
0
0
1
0
0
1↑/0
1
0
1
*
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
0
0
0
1
0
AL
STOP
IRTR
AASX
0
0
0
0
0
0
0↓
0
0
0
0
0
0
0
0
1↑
1↑
0
0
1↑/0
1
*
0
0↓
0
0
0↓
0
1↑/0
0
2
*
0
1↑/0
2
*
0
0↓
Section 18 I
AAS
ADZ
ACKB
ICDRF
0
0
0
0
0
0
1↑
0
0
1↑
1↑
1↑
0
1↑
0
0
0
1↑
0
1↑
0
0
0↓
0
0
0
0
0↓
0
0
0
0
0
1↑
0↓
0↓
0↓
Rev. 1.00 Mar. 12, 2008 Page 605 of 1178
2
C Bus Interface (IIC)
State
ICDRE
0
Idle state (flag
clearing
required)
1↑
Start condition
detected
1
SAR match in
first frame
(SARX≠SAR)
1
General call
address
match in first
frame
(SARX≠H'00)
1
SAR match in
first frame
(SAR≠SARX)
Transmission
end (ACKE=1
and ACKB=1)
1↑
Transmission
end with
ICDRE=0
0↓
ICDR write
with the above
state
1
Transmission
end with
ICDRE=1
0↓
ICDR write
with the above
state
1↑
Automatic
data transfer
from ICDRT to
ICDRS with
the above
state
Reception end
with ICDRF=0
ICDR read
with the above
state
REJ09B0403-0100
Advertisement
