Location Of Register Information And Dtc Vector Table - Renesas H8S Family Hardware Manual

Location of Register Information and DTC Vector Table

Locate the register information in the on-chip RAM (addresses: H'FFEC00 to H'FFEFFF).

The method for locating the register information in address space is shown in figure 7.3. Locate

MRA, SAR, MRB, DAR, CRA, and CRB, in that order, from the start address of the register

information. In the case of chain transfer, register information should be located in consecutive

areas as shown in figure 7.3, and the register information start address should be located at the

vector address corresponding to the interrupt source in the DTC vector table. The DTC reads the

start address of the register information from the vector table set for each activation source, and

then reads the register information from that start address.

When the DTC is activated by software, the vector address is obtained from: H'0400 +

(DTVECR[6:0] × 2). For example, if DTVECR is H'10, the vector address is H'0420.

The configuration of the vector address is a 2-byte unit. Specify the lower two bytes of the register

information start address.

start address

Figure 7.3 DTC Register Information Location in Address Space

Lower address

Section 7 Data Transfer Controller (DTC)

Rev. 1.00 Mar. 12, 2008 Page 173 of 1178

for 2nd transfer in

chain transfer

REJ09B0403-0100