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Port
Description
Port 9
General I/O port
multiplexed with
PWMX output and
bus control I/O
Port A
General I/O port
multiplexed with
interrupt input, DTC
event counter input,
EtherC control I/O,
and address output
Port B
General I/O port
multiplexed with DTC
event counter input
and EtherC control
I/O
General I/O port
multiplexed with de-
bounced input, DTC
event counter input,
and EtherC control
I/O
Port C
General I/O port
multiplexed with bus
control output
General I/O port
multiplexed with IIC_2
to IIC_4 I/O
Single-Chip Mode
(EXPE = 0)
P97
P96
P95
P94/ExPWX1
P93/ExPWX0
P92
P91
P90
PA7/ExIRQ7/EVENT7
PA6/ExIRQ6/EVENT6/LNKSTA
PA5/ExIRQ5/EVENT5/WOL
PA4/ExIRQ4/EVENT4
PA3/ExIRQ3/EVENT3
PA2/ExIRQ2/EVENT2
PA1/ExIRQ1/EVENT1
PA0/ExIRQ0/EVENT0
PB7/EVENT15/RM_RX-ER
PB6/EVENT14/RM_CRS-DV
PB5/EVENT13/RM_REF-CLK
PB4/EVENT12/RM_TX-EN
PB3/DB3/EVENT11/RM_RXD1
PB2/DB2/EVENT10/RM_RXD0
PB1/DB1/EVENT9/RM_TXD1
PB0/DB0/EVENT8/RM_TXD0
PC7
PC6
PC5/SDA4
PC4/SCL4
PC3/SDA3
PC2/SCL3
PC1/SDA2
PC0/SCL2
Extended Mode
(EXPE = 1)
P97/WAIT/CS256
Same as left
AS/IOS
Same as left
P92/HBE
P91/AH
P90/LBE
PA7/ExIRQ7/EVENT7/A23
PA6/ExIRQ6/EVENT6/LNKSTA/A22
PA5/ExIRQ5/EVENT5/WOL/A21
PA4/ExIRQ4/EVENT4/A20
PA3/ExIRQ3/EVENT3/A19
PA2/ExIRQ2/EVENT2/A18
PA1/ExIRQ1/EVENT1/A17
PA0/ExIRQ0/EVENT0/A16
Same as left
Same as left
RD
PC6/LWR
Same as left
Rev. 1.00 Mar. 12, 2008 Page 273 of 1178
Section 8 I/O Ports
Feature of
I/O
Built-in input
pull-up MOS
NMOS
push-pull
output
REJ09B0403-0100
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