Table of Contents
Advertisement
Section 13 Serial Communication Interface
13.2.5
Serial Mode Register (SMR)
SMR is an 8-bit register that specifies the SCI's serial communication format and selects the clock
source for the baud rate generator.
7
Bit
C/A
Initial value
0
Read/Write
R/W
The CPU can always read and write SMR. SMR is initialized to H'00 by a reset and in standby
mode.
Rev. 4.00 Jan 26, 2006 page 484 of 938
REJ09B0276-0400
5
6
CHR
PE
0
0
R/W
R/W
Parity enable
Enables or disables the addition of a parity bit
Character length
Selects character length in asynchronous mode
Communication mode
Selects asynchronous or synchronous mode
4
3
2
O/E
STOP
MP
0
0
0
R/W
R/W
R/W
Stop bit length
Selects the stop bit length
Parity mode
Selects even or odd parity
1
0
CKS1
CKS0
0
0
R/W
R/W
Clock select 1/0
These bits select the
baud rate generator's
clock source
Multiprocessor mode
Selects the multiprocessor
function
Advertisement
Table of Contents
