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Serial Data Transmission (Except In Block Transfer Mode) - Renesas H8S Family Hardware Manual

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Section 13 Serial Communication Interface (SCI)
To switch from reception to transmission, first verify that reception has completed, and initialize
the SCI. At the end of initialization, RE and TE should be set to 0 and 1, respectively. Reception
completion can be verified by reading the RDRF flag or PER and ORER flags. To switch from
transmission to reception, first verify that transmission has completed, and initialize the SCI. At
the end of initialization, TE and RE should be set to 0 and 1, respectively. Transmission
completion can be verified by reading the TEND flag.
13.7.6

Serial Data Transmission (Except in Block Transfer Mode)

Data transmission in smart card interface mode (except in block transfer mode) is different from
that in normal serial communication interface mode in that an error signal is sampled and data is
re-transmitted. Figure 13.26 shows the data re-transfer operation during transmission.
1. If an error signal from the receiving end is sampled after one frame of data has been
transmitted, the ERS bit in SSR is set to 1. Here, an ERI interrupt request is generated if the
RIE bit in SCR is set to 1. Clear the ERS bit to 0 before the next parity bit is sampled.
2. For the frame in which an error signal is received, the TEND bit in SSR is not set to 1. Data is
re-transferred from TDR to TSR allowing automatic data retransmission.
3. If no error signal is returned from the receiving end, the ERS bit in SSR is not set to 1. In this
case, one frame of data is determined to have been transmitted including re-transfer, and the
TEND bit in SSR is set to 1. Here, a TXI interrupt request is generated if the TIE bit in SCR is
set to 1. Writing transmit data to TDR starts transmission of the next data.
Figure 13.28 shows a sample flowchart for transmission. All the processing steps are
automatically performed using a TXI interrupt request to activate the DTC. In transmission, the
TEND and TDRE flags in SSR are simultaneously set to 1, thus generating a TXI interrupt request
when TIE in SCR is set. This activates the DTC by a TXI request thus allowing transfer of
transmit data if the TXI interrupt request is specified as a source of DTC activation beforehand.
The TDRE and TEND flags are automatically cleared to 0 at data transfer by the DTC. If an error
occurs, the SCI automatically re-transmits the same data. During re-transmission, TEND remains
as 0, thus not activating the DTC. Therefore, the SCI and DTC automatically transmit the
specified number of bytes, including re-transmission in the case of error occurrence. However, the
ERS flag is not automatically cleared; the ERS flag must be cleared by previously setting the RIE
bit to 1 to enable an ERI interrupt request to be generated at error occurrence.
When transmitting/receiving data using the DTC, be sure to set and enable it prior to making SCI
settings. See section 7, Data Transfer Controller (DTC) for DTC settings.
Rev. 1.00 Mar. 12, 2008 Page 480 of 1178
REJ09B0403-0100

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R4f2472R4f2462H8s/2462H8s/2400 seriesH8s/2472