Table Of Contents - Renesas H8S Family Hardware Manual

28.7 Module Stop Mode .......................................................................................................... 1072
28.8 Usage Notes ..................................................................................................................... 1072
28.8.1 I/O Port Status..................................................................................................... 1072
28.8.2 Current Consumption when Waiting for Oscillation Settling ............................. 1072
28.8.3 DTC Module Stop Mode .................................................................................... 1072
28.8.4 Notes on Subclock Usage ................................................................................... 1072
Section 29 List Of Registers .............................................................................1073
29.1 Register Addresses (Address Order)................................................................................ 1074
29.2 Register Bits..................................................................................................................... 1088
29.3 Register States in Each Operating Mode ......................................................................... 1106
Section 30 Platform Environment Control Interface (Peci)...........................1119
Section 31 Electrical Characteristics ...............................................................1121
31.1 Absolute Maximum Ratings ............................................................................................ 1121
31.2 DC Characteristics ........................................................................................................... 1122
31.3 AC Characteristics ........................................................................................................... 1127
31.3.1 Clock Timing ...................................................................................................... 1127
31.3.2 Control Signal Timing ........................................................................................ 1132
31.3.3 Bus Timing ......................................................................................................... 1134
31.3.4 Multiplex Bus Timing......................................................................................... 1143
31.3.5 Timing of On-Chip Peripheral Modules ............................................................. 1146
31.4 A/D Conversion Characteristics....................................................................................... 1162
31.5 Flash Memory Characteristics ......................................................................................... 1163
31.6 Usage Notes ..................................................................................................................... 1164
Appendix .......................................................................................................1165
A. I/O Port States in Each Processing State.......................................................................... 1165
B. Product Lineup................................................................................................................. 1168
C. Package Dimensions ........................................................................................................ 1169
Index .......................................................................................................1171
Rev. 1.00 Mar. 12, 2008 Page xxvii of xIviii