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Section 8 I/O Ports
• P96
The pin function is switched as shown below according to the P96DDR bit.
P96DDR
Pin function
• P95/AS/IOS
The pin function is switched as shown below according to the operating mode and the
combination of the IOSE bit in SYSCR and the P95DDR bit.
Operating
mode
P95DDR
IOSE
AS output pin
Pin function
[Legend] X: Don't care.
• P94/ExPWX1
The pin function is switched as shown below according to the combination of the OEB bit in
DACR and the PWMXS bit in PTCNT0 of the PWMX_0 module and the P94DDR bit.
P94DDR
PWMXS
OEB
Pin function
[Legend] X: Don't care.
• P93/ExPWX0
The pin function is switched as shown below according to the combination of the OEA bit in
DACR and the PWMXS bit in PTCNT0 of the PWMX_0 module and the P93DDR bit.
P93DDR
PWMXS
OEA
Pin function
[Legend] X: Don't care.
Rev. 1.00 Mar. 12, 2008 Page 236 of 1178
REJ09B0403-0100
0
P96 input pin
Extended mode
X
0
IOS output pin
0
0
1
X
0
P94 input pin
0
0
1
X
0
P93 input pin
0
1
X
P95 input pin
1
0
X
P94 output pin
1
0
X
P93 output pin
1
P96 output pin
Single-chip mode
1
X
P95 output pin
X
1
1
0
1
ExPWX1 output pin
X
1
1
0
1
ExPWX0 output pin
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