Input/Output Pins - Renesas H8S Family Hardware Manual

Section 5 Interrupt Controller
SYSCR
NMI input
IRQ input
Internal interrupt sources
SWDTEND to EINT
[Legend]
ICR: Interrupt control register
ISCR: IRQ sense control register
IER: IRQ enable register
ISR: IRQ status register
SYSCR: System control register
5.2

Input/Output Pins

Table 5.1 summarizes the pins of the interrupt controller.
Table 5.1 Pin Configuration
Symbol I/O
NMI Input
IRQ15 to IRQ0
Input
ExIRQ15 to
ExIRQ0
Rev. 1.00 Mar. 12, 2008 Page 78 of 1178
REJ09B0403-0100
INTM1, INTM0
NMIEG
NMI input
IRQ input
ISR
ISCR IER
Interrupt controller
Figure 5.1 Block Diagram of Interrupt Controller
Function
Nonmaskable external interrupt
Rising edge or falling edge can be selected
Maskable external interrupts
Rising edge, falling edge, or both edges, or level sensing can be
selected individually for each pin. Pin of IRQn or ExIRQn to input
IRQn (n = 15 to 0) interrupt can be selected.
Interrupt
request
Vector number
Priority level
determination
ICR
CPU
I, UI
CCR