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Bit
Bit Name
4
AST
3
WMS1
2
WMS0
1
WC1
0
WC0
Initial
Value
R/W
Description
1
R/W
Basic Extended Area Access State Control
Selects the number of states for access to the basic
extended area. This bit also enables or disables wait-
state insertion.
[ADMXE = 0] Normal extension
0: 2-state access space. Wait state insertion disabled
1: 3-state access space. Wait state insertion enabled
[ADMXE = 1] Address-data multiplex extension
0: 2-state data access space. Wait state insertion
disabled
1: 3-state data access space. Wait state insertion
enabled
When the CS256E bit in SYSCR is set to 1, this bit setting
is ignored in access to the 256-Kbyte extended area.
0
R/W
Basic Extended Area Wait Mode Select 1 and 0
0
R/W
Selects the wait mode for access to the basic extended
area when the AST bit is set to 1.
00: Program wait mode
01: Wait disabled mode
10: Pin wait mode
11: Pin auto-wait mode
When the CS256E bit in SYSCR is set to 1, this bit setting
is ignored in access to the 256-Kbyte extended area.
1
R/W
Basic Extended Area Wait Count 1 and 0
1
R/W
Selects the number of program wait states to be inserted
when the basic extended area is accessed when the AST
bit is set to 1. The program wait state is only inserted into
data cycles.
00: Program wait state is not inserted
01: 1 program wait state is inserted
10: 2 program wait states are inserted
11: 3 program wait states are inserted
When the CS256E bit in SYSCR is set to 1, this bit setting
is ignored in access to the 256-Kbyte extended area.
Section 6 Bus Controller (BSC)
Rev. 1.00 Mar. 12, 2008 Page 113 of 1178
REJ09B0403-0100
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