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Renesas H8S Family Hardware Manual page 629

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Start
[1]
Initial setting
[2]
RE = 1 (reception started)
Read SSSR
No
RDRF = 1?
ORER = 1?
Consecutive data reception?
Read received data in SSRDR
RDRF automatically cleared
[4]
RE = 0
Read receive data in SSRDR
End reception
[5]
Overrun error processing
Clear ORER in SSSR
End reception
Note: Hatching boxes represent SSU internal operations.
(4)
Data Transmission/Reception
Figure 17.17 shows a flowchart example of simultaneous transmission/reception. The data
transmission/reception is performed combining the data transmission and data reception as
mentioned above. The data transmission/reception is started by writing transmit data to SSTDR
with TE = RE = 1.
Yes
Yes
[3]
No
No
Yes
Figure 17.16 Flowchart Example of Data Reception
(Clock Synchronous Communication Mode)
Section 17 Synchronous Serial Communication Unit (SSU)
[1]
Initial setting:
Specify the receive data format.
[2]
Start reception:
When setting the RE bit to 1, reception is started.
[3], [5] Receive error processing:
When a receive error occurs, execute the designated error
processing after reading the ORER bit in SSSR. After that,
clear the ORER bit to 0. While the ORER bit is set to 1,
transmission or reception is not resumed.
[4]
To complete reception:
To complete reception, read receive data after clearing the
RE bit to 0. When reading SSRDR without clearing the RE
bit, reception is resumed.
Rev. 1.00 Mar. 12, 2008 Page 581 of 1178
REJ09B0403-0100

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R4f2472R4f2462H8s/2462H8s/2400 seriesH8s/2472