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φ
Address bus
(A23 to A0)
CS
IOS (IOSE = 1)
CS256 (CS256E = 1)
AS*
HBE
LBE
RD
Read
D15 to D8
D7 to D0
WR
D15 to D8
Write
D7 to D0
Note:
* For external address space access, this signal is not output when the 256-Kbyte extended area
is accessed with CS256E = 1.
Figure 6.15 Glueless Extension Word Access (ADMXE = 0)
Bus cycle
Even
valid
valid
Valid
Valid
Rev. 1.00 Mar. 12, 2008 Page 139 of 1178
Section 6 Bus Controller (BSC)
REJ09B0403-0100
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