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Renesas H8S Family Hardware Manual page 659

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2
18.3.8
I
C Bus Extended Control Register (ICXR)
ICXR enables or disables the I
operation, and indicates the status of receive/transmit operations.
Bit
Bit Name
7
STOPIM
6
HNDS
2
C bus interface interrupt generation and continuous receive
Initial
Value
R/W
Description
0
R/W
Stop Condition Interrupt Source Mask
Enables or disables the interrupt generation when the
stop condition is detected in slave mode.
0: Enables IRIC flag setting and interrupt generation when
the stop condition is detected (STOP = 1 or ESTP = 1)
in slave mode.
1: Disables IRIC flag setting and interrupt generation
when the stop condition is detected.
0
R/W
Handshake Receive Operation Select
Enables or disables continuous receive operation in
receive mode.
0: Enables continuous receive operation
1: Disables continuous receive operation
When the HNDS bit is cleared to 0, receive operation is
performed continuously after data has been received
successfully while ICDRF flag is 0.
When the HNDS bit is set to 1, SCL is fixed to the low
level after data has been received successfully while
ICDRF flag is 0; thus disabling the next data to be
transferred. The bus line is released and next receive
operation is enabled by reading the receive data in ICDR.
2
Section 18 I
C Bus Interface (IIC)
Rev. 1.00 Mar. 12, 2008 Page 611 of 1178
REJ09B0403-0100

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R4f2472R4f2462H8s/2462H8s/2400 seriesH8s/2472