Multiprocessor Serial Data Reception - Renesas H8S Family Hardware Manual

Multiprocessor Serial Data Reception

Figure 13.13 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in

SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data

with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is

generated at this time. All other SCI operations are the same as in asynchronous mode. Figure

13.12 shows an example of SCI operation for multiprocessor format reception.

Figure 13.12 Example of SCI Operation in Reception

(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)

RXI interrupt

(multiprocessor

(a) Data does not match station's ID

RXI interrupt

(multiprocessor

(b) Data matches station's ID

Section 13 Serial Communication Interface (SCI)

Data (Data 1)

RDR data read

If not this station's ID,

and RDRF flag

MPIE bit is set to 1

cleared to 0 in

RXI interrupt

service routine

Data (Data 2)

RDR data read and

Matches this station's ID,

RDRF flag cleared

so reception continues, and

to 0 in RXI interrupt

data is received in RXI

service routine

interrupt service routine

Rev. 1.00 Mar. 12, 2008 Page 463 of 1178

(mark state)

RXI interrupt request is

not generated, and RDR

retains its state

(mark state)

MPIE bit set to 1

REJ09B0403-0100