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Section 21 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Section 21 Ethernet Controller Direct Memory Access
Controller (E-DMAC)
This LSI includes a direct memory access controller (E-DMAC) directly connected to the Ethernet
controller (EtherC). A large proportion of buffer management is controlled by the E-DMAC itself
using descriptors. This lightens the load on the CPU and enables efficient data transfer control to
be achieved.
21.1
Features
The E-DMAC has the following features:
• The load on the CPU is reduced by means of a descriptor management system
• Transmit/receive frame status information is indicated in descriptors
• Achieves efficient system bus utilization through the use of block transfer (16-byte units)
• Supports single-frame/multi-buffer operation
Figure 21.1 shows the configuration of the E-DMAC, and the descriptors and transmit/receive
buffers in memory.
Rev. 1.00 Mar. 12, 2008 Page 791 of 1178
REJ09B0403-0100
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