Advertisement
3.4
Address Map
Figure 3.1 shows the memory map in operating modes.
Notes: * These areas can be used as an external address space by clearing bit RAME in SYSCR to 0.
ROM: 512 Kbytes, RAM: 40 Kbytes
Mode 2 (EXPE = 1)
Advanced mode
Extended mode with
on-chip ROM
H'000000
On-chip ROM
H'07FFFF
H'080000
External address
space
H'F7FFFF
H'F80000
256 Kbytes
H'FBFFFF
extended area
H'FC0000
External address
space
H'FEFFFF
H'FF0000
Reserved area
H'FF07FF
H'FF0800
On-chip RAM
(36 Kbytes)
H'FF97FF
H'FF9800
Reserved area
H'FFDFFF
H'FFE000
External address
H'FFE07F
space
H'FFE080
On-chip RAM
(3,968 bytes)
H'FFEFFF
H'FFF000
External address
space
H'FFF7FF
(IOS extended area)
H'FFF800
Internal I/O
registers 3
H'FFFE3F
Internal I/O
H'FFFE40
registers 2
H'FFFEFF
On-chip RAM
H'FFFF00
(128 bytes)
H'FFFF7F
H'FFFF80
Internal I/O
registers 1
H'FFFFFF
Figure 3.1 Address Map
ROM: 512 Kbytes, RAM: 40 Kbytes
Mode 2 (EXPE = 0)
Advanced mode
Single-chip mode
H'000000
H'07FFFF
H'FF0000
H'FF07FF
H'FF0800
*
H'FF97FF
H'FF9800
*
H'FFBFFF
H'FFE080
*
H'FFEFFF
H'FFF800
H'FFFE3F
H'FFFE40
H'FFFEFF
H'FFFF00
*
H'FFFF7F
H'FFFF80
H'FFFFFF
Rev. 1.00 Mar. 12, 2008 Page 67 of 1178
Section 3 MCU Operating Modes
On-chip ROM
Reserved area
On-chip RAM
(36 Kbytes)
Reserved area
On-chip RAM
(3,968 bytes)
Internal I/O
registers 3
Internal I/O
registers 2
On-chip RAM
(128 bytes)
Internal I/O
registers 1
REJ09B0403-0100
Advertisement
