Transmit Shift Register (Tsr); Serial Mode Register (Smr) - Renesas H8SX/1500 Series Hardware Manual

Section 12 Serial Communication Interface (SCI)
12.3.4

Transmit Shift Register (TSR)

TSR is a shift register that transmits serial data. To perform serial data transmission, the SCI first
automatically transfers transmit data from TDR to TSR, then sends the data to the TxD pin. TSR
cannot be directly accessed by the CPU.
12.3.5

Serial Mode Register (SMR)

SMR is used to set the SCI's serial transfer format and select the baud rate generator clock source.
Some bits in SMR have different functions in normal mode and smart card interface mode.
• When SMIF in SCMR = 0
Bit
7
Bit Name C/A
Initial Value
0
R/W R/W
• When SMIF in SCMR = 1
7
Bit
GM
Bit Name
0
Initial Value
R/W
R/W
Bit Functions in Normal Serial Communication Interface Mode (When SMIF in SCMR = 0):
Bit Bit Name
7 C/A
6 CHR
Rev. 3.00 Mar. 14, 2006 Page 382 of 804
REJ09B0104-0300
6 5
CHR PE
0 0
R/W R/W
6 5
BLK PE
0 0
R/W R/W
Initial
Value R/W Description
0 R/W Communication Mode
0: Asynchronous mode
1: Clocked synchronous mode
0 R/W Character Length (valid only in asynchronous mode)
0: Selects 8 bits as the data length.
1: Selects 7 bits as the data length. LSB-first is fixed and
In clocked synchronous mode, a fixed data length of 8
bits is used.
4 3
O/E STOP
0 0
R/W R/W
4 3
O/E BCP1
0 0
R/W R/W
the MSB (bit 7) in TDR is not transmitted in
transmission.
2 1
MP CKS1
0 0
R/W R/W
2 1
BCP0 CKS1
0 0
R/W R/W
0
CKS0
0
R/W
0
CKS0
0
R/W