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Renesas H8S Family Hardware Manual page 983

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Flash Transfer Destination Address Register (FTDAR)
FTDAR is a register that specifies the address to download an on-chip program. This register must
be specified before setting the SCO bit in FCCS to 1.
Initial
Bit
Bit Name
Value
7
TDER
0
6
TDA6
0
5
TDA5
0
4
TDA4
0
3
TDA3
0
2
TDA2
0
1
TDA1
0
0
TDA0
0
R/W
Description
R/W
Transfer Destination Address Setting Error
This bit is set to 1 when the address specified by bits
TDA6 to TDA0, which is the start address to download an
on-chip program, is over the range. Whether or not the
range specified by bits TDA6 to TDA0 is within the range
of H'00 to H'03 is determined when an on-chip program is
downloaded by setting the SCO bit in FCCS to 1. Make
sure that this bit is cleared to 0 before setting the SCO bit
to 1 and the value specified by TDA6 to TDA0 is within
the range of H'00 to H'03.
0: The value specified by bits TDA6 to TDA0 is within the
range.
1: The value specified by is TDA6 to TDA0 is over the
range (H'04 to H'FF) and the download is stopped.
R/W
Transfer Destination Address
R/W
Specifies the start address to download an on-chip
program. H'00 to H'03 can be specified as the start
R/W
address in the on-chip RAM space.
R/W
H'00: H'FFE080 is specified as a start address to
R/W
download an on-chip program.
R/W
H'01: H'FF0800 is specified as a start address to
download an on-chip program.
R/W
H'02: H'FF1800 is specified as a start address to
download an on-chip program.
H'03: H'FF8800 is specified as a start address to
download an on-chip program.
H'04 to H'FF: Setting prohibited. Specifying this value
Section 25 Flash Memory
sets the TDER bit to 1 and stops the
download.
Rev. 1.00 Mar. 12, 2008 Page 935 of 1178
REJ09B0403-0100

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R4f2472R4f2462H8s/2462H8s/2400 seriesH8s/2472