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Section 9 14-Bit PWM Timer (PWMX)
9.3.3
PWMX (D/A) Control Register (DACR)
DACR enables the PWM outputs, and selects the output phase and operating speed.
Bit
Bit Name
7
6
PWME
5, 4
3
OEB
2
OEA
1
OS
0
CKS
Rev. 1.00 Mar. 12, 2008 Page 362 of 1178
REJ09B0403-0100
Initial
Value
R/W
Description
0
R/W
Reserved
The initial value should not be changed.
0
R/W
PWMX Enable
Starts or stops the PWM D/A counter (DACNT).
0: DACNT operates as a 14-bit up-counter
1: DACNT halts at H'0003
All 1
R
Reserved
These bits are always read as 1 and cannot be modified.
0
R/W
Output Enable B
Enables or disables output on PWMX (D/A) channel B.
0: PWMX (D/A) channel B output (at the PWX1, PWX3
pins) is disabled
1: PWMX (D/A) channel B output (at the PWX1, PWX3
pins) is enabled
0
R/W
Output Enable A
Enables or disables output on PWMX (D/A) channel A.
0: PWMX (D/A) channel A output (at the PWX0, PWX2
pin) is disabled
1: PWMX (D/A) channel A output (at the PWX0, PWX2
pins) is enabled
0
R/W
Output Select
Selects the phase of the PWMX (D/A) output.
0: Direct PWMX (D/A) output
1: Inverted PWMX (D/A) output
0
R/W
Clock Select
Selects the PWMX (D/A) resolution. Eight kinds of
resolution can be selected.
0: Operates at resolution (T) = system clock cycle time
(t
1: Operates at resolution (T) = system clock cycle time
(t
16384.
)
cyc
) × 2, × 64, × 128, × 256, × 1024, × 4096, and ×
cyc
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