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2
Section 18 I
C Bus Interface (IIC)
Bit
Bit Name
4
AASX
3
AL
Rev. 1.00 Mar. 12, 2008 Page 608 of 1178
REJ09B0403-0100
Initial
Value
R/W
Description
0
R/(W)* Second Slave Address Recognition Flag
In I
the first frame following a start condition matches bits
SVAX6 to SVAX0 in SARX.
[Setting condition]
When the second slave address is detected in slave
receive mode and FSX = 0 in SARX
[Clearing conditions]
•
•
•
0
R/(W)* Arbitration Lost Flag
Indicates that arbitration was lost in master mode.
[Setting conditions]
When ALSL=0
•
•
When ALSL=1
•
•
[Clearing conditions]
•
•
2
C bus format slave receive mode, this flag is set to 1 if
When 0 is written in AASX after reading AASX = 1
When a start condition is detected
In master mode
If the internal SDA and SDA pin disagree at the rise of
SCL in master transmit mode
If the internal SCL line is high at the fall of SCL in
master mode
If the internal SDA and SDA pin disagree at the rise of
SCL in master transmit mode
If the SDA pin is driven low by another device before
2
the I
C bus interface drives the SDA pin low, after the
start condition instruction was executed in master
transmit mode
When ICDR is written to (transmit mode) or read from
(receive mode)
When 0 is written in AL after reading AL = 1
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