Register Descriptions - Renesas H8S Family Hardware Manual

Section 21 Ethernet Controller Direct Memory Access Controller (E-DMAC)

Figure 21.1 Configuration of E-DMAC, and Descriptors and Buffers

21.2

The E-DMAC has the following registers.

• E-DMAC mode register (EDMR)

• E-DMAC transmit request register (EDTRR)

• E-DMAC receive request register (EDRRR)

• Transmit descriptor list address register (TDLAR)

• Receive descriptor list address register (RDLAR)

• EtherC/E-DMAC status register (EESR)

• EtherC/E-DMAC status interrupt permission register (EESIPR)

• Transmit/receive status copy enable register (TRSCER)

• Receive missed-frame counter register (RMFCR)

• Transmit FIFO threshold register (TFTR)

• FIFO depth register (FDR)

• Receiving method control register (RMCR)

Rev. 1.00 Mar. 12, 2008 Page 792 of 1178

REJ09B0403-0100

Transmit DMAC

Receive DMAC