Download Print this page

Renesas H8S Family Hardware Manual page 440

Advertisement

Section 11 8-Bit Timer (TMR)
Figures 11.1 and 11.2 are block diagrams of 8-bit timers.
Select clock
Control logic
[Legend]
TCORA_0:
Time constant register A_0
TCORB_0:
Time constant register B_0
TCNT_0:
Timer counter_0
TCSR_0:
Timer control/status register_0
TCR_0:
Timer control register_0
Figure 11.1 Block Diagram of 8-Bit Timer (TMR_0 and TMR_1)
Rev. 1.00 Mar. 12, 2008 Page 392 of 1178
REJ09B0403-0100
Internal clock
TMR_0
φ/2, φ/8, φ/32, φ/64, φ/256, φ/1024
TMR_1
φ/2, φ/8, φ/64, φ/128, φ/1024, φ/2048
Clock 1
Clock 0
Compare match A1
Compare match A0
Overflow 1
Overflow 0
Clear 0
Compare match B1
Compare match B0
Interrupt signals
CMIA0
CMIB0
OVI0
CMIA1
CMIB1
OVI1
TCORA_0
TCORA_1
Comparator A_0
Comparator A_1
TCNT_0
TCNT_1
Clear 1
Comparator B_0
Comparator B_1
TCORB_0
TCORB_1
TCSR_0
TCSR_1
TCR_0
TCR_1
TCORA_1:
Time constant register A_1
TCORB_1:
Time constant register B_1
TCNT_1:
Timer counter_1
TCSR_1:
Timer control/status register_1
TCR_1:
Timer control register_1

Advertisement

loading

This manual is also suitable for:

R4f2472R4f2462H8s/2462H8s/2400 seriesH8s/2472