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A/D Control Register (Adcr) - Renesas H8S Family Hardware Manual

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23.3.3

A/D Control Register (ADCR)

The ADCR sets the operation mode of A/D converter and the conversion time.
Bit
Bit Name
7
TRGS1
6
TRGS0
0
EXTRGS
5
SCANE
4
SCANS
3
CKS1
2
CKS0
1
ADSTCLR
[Legend]
x: Don't care
Initial
Value
R/W
Description
0
R/W
Timer Trigger Select 1 and 0, Extended Trigger Select
Enable starting of A/D conversion by a trigger signal.
0
R/W
00 0: Disables starting by trigger signals.
0
R/W
10 0: Enables starting by a trigger from TMR_0.
10 1: Enables starting by the ADTRG pin input.
Other than above: Setling prohibited
0
R/W
Scan Mode
0
R/W
Select the operation mode of A/D conversion
0x: Single mode
10: Scan mode
11: Scan mode
0
R/W
Clock Select 1 and 0
0
R/W
Set the A/D conversion time. Setting should be made
while the conversion is stopped (ADST = 0).
00: Setting prohibited
01: Conversion time = 80 states (max) (20 MHz or less)
10: Conversion time = 160 states (max)
11: Conversion time = 320 states (max)
0
R/W
A/D Start Clear
Sets automatic clearing of the ADST bit in scan mode.
0: Disables automatic clearing of ADST in scan mode.
1: ADST is automatically cleared when A/D conversion for
all the selected channels has been completed in scan
mode.
(consecutive A/D conversion of channels 1 to 4)
(consecutive A/D conversion of channels 1 to 8)
Rev. 1.00 Mar. 12, 2008 Page 901 of 1178
Section 23 A/D Converter
REJ09B0403-0100

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This manual is also suitable for:

R4f2472R4f2462H8s/2462H8s/2400 seriesH8s/2472