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Renesas H8S Family Hardware Manual page 496

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Section 13 Serial Communication Interface (SCI)
Table 13.7 Maximum Bit Rate with External Clock Input (Clock Synchronous Mode)
φ (MHz)
20
25
34
Table 13.8 BRR Settings for Various Bit Rates (Smart Card Interface Mode, n = 0, s = 372)
20.00
Bit Rate
(bit/s)
n
N
Error (%)
9600
0
2
–6.65
Table 13.9 Maximum Bit Rate for Each Frequency (Smart Card Interface Mode, S = 372)
φ (MHz)
20.00
21.4272
25.00
34.00
Rev. 1.00 Mar. 12, 2008 Page 448 of 1178
REJ09B0403-0100
External Input Clock (MHz)
3.3333
4.1667
5.6667
Operating Frequency φ (MHz)
21.4272
n
N
Error(%)
0
2
0.00
Maximum Bit Rate (bit/s)
26882
28800
33602
45699
Maximum Bit Rate (bit/s)
3333333.3
4166666.7
5666666.7
25
n
N
Error (%)
0
3
–12.49
n
0
0
0
0
34
n
N
Error (%)
0
4
–4.79
N
0
0
0
0

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