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Table 8.8
Port D Input Pull-Up MOS States......................................................................... 261
Table 8.9
Port Functions ....................................................................................................... 271
Table 8.10
Port 1 Input Pull-Up MOS States.......................................................................... 277
Table 8.11
Port 2 Input Pull-Up MOS States.......................................................................... 282
Table 8.12
Port 3 Input Pull-Up MOS States.......................................................................... 288
Table 8.13
Port 4 Input Pull-Up MOS States.......................................................................... 296
Table 8.14
Port 6 Input Pull-Up MOS States.......................................................................... 308
Table 8.15
Input Pull-Up MOS States .................................................................................... 329
Table 8.16
Port D Input Pull-Up MOS States......................................................................... 345
Section 9 14-Bit PWM Timer (PWMX)
Table 9.1
Pin Configuration.................................................................................................. 358
Table 9.2
Clock Select of PWMX_1 and PWMX_0 ............................................................ 363
Settings and Operation (Examples when φ = 34 MHz)......................................... 366
Table 9.3
Table 9.4
Locations of Additional Pulses Added to Base Pulse (When CFS = 1)................ 371
Section 10 16-Bit Free-Running Timer (FRT)
Table 10.1
FRT Interrupt Sources .......................................................................................... 384
Table 10.2
Switching of Internal Clock and FRC Operation .................................................. 389
Section 11 8-Bit Timer (TMR)
Table 11.1 (1)
Clock Input to TCNT and Count Condition (TMR_0) ................................. 397
Table 11.1 (2)
Clock Input to TCNT and Count Condition (TMR_1) ................................. 398
Table 11.1 (3)
Clock Input to TCNT and Count Condition (TMR_X, TMR_Y) ................. 398
Table 11.2
Registers Accessible by TMR_X/TMR_Y ........................................................... 403
Table 11.3
Interrupt Sources of 8-Bit Timers TMR_0, TMR_1, TMR_Y, and TMR_X ....... 407
Table 11.4
Switching of Internal Clocks and TCNT Operation.............................................. 411
Section 12 Watchdog Timer (WDT)
Table 12.1
Pin Configuration.................................................................................................. 415
Table 12.2
WDT Interrupt Source .......................................................................................... 424
Section 13 Serial Communication Interface (SCI)
Table 13.1
Pin Configuration.................................................................................................. 432
Table 13.2
Relationships between N Setting in BRR and Bit Rate B..................................... 445
Table 13.3
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode)............ 446
Table 13.4
Maximum Bit Rate for Each Frequency (Asynchronous Mode) .......................... 446
Table 13.5
Maximum Bit Rate with External Clock Input (Asynchronous Mode) ................ 446
Table 13.6
BRR Settings for Various Bit Rates (Clock Synchronous Mode)......................... 447
Table 13.7
Maximum Bit Rate with External Clock Input (Clock Synchronous Mode) ........ 448
Table 13.8
BRR Settings for Various Bit Rates
(Smart Card Interface Mode, n = 0, s = 372)........................................................ 448
Rev. 1.00 Mar. 12, 2008 Page xliii of xIviii
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