Internal Interrupts - Renesas H8S Family Hardware Manual

IRQn input or

ExIRQn* input

Figure 5.2 Block Diagram of Interrupts IRQ15 to IRQ0

Internal Interrupts

Internal interrupts issued from the on-chip peripheral modules have the following features:

• For each on-chip peripheral module there are flags that indicate the interrupt request status,

and enable bits that individually select enabling or disabling of these interrupts. When the

enable bit for a particular interrupt source is set to 1, an interrupt request is sent to the interrupt

• The control level for each interrupt can be set by ICR.

• The DTC can be activated by an interrupt request from an on-chip peripheral module.

• An interrupt request that activates the DTC is not affected by the interrupt control mode or the

status of the CPU interrupt mask bits.

IRQnSCA, IRQnSCB

detection circuit

Clear signal

Rev. 1.00 Mar. 12, 2008 Page 87 of 1178

Section 5 Interrupt Controller

IRQn interrupt

REJ09B0403-0100