Section 24 Ram - Renesas H8S Family Hardware Manual

Section 24 RAM

Section 24 RAM
This LSI has 40 Kbytes of on-chip high-speed static RAM. The RAM is connected to the CPU by
a 16-bit data bus, enabling one-state access by the CPU to both byte data and word data.
The on-chip RAM can be enabled or disabled by means of the RAME bit in the system control
register (SYSCR). For details on SYSCR, see section 3.2.2, System Control Register (SYSCR).
Rev. 1.00 Mar. 12, 2008 Page 915 of 1178
REJ09B0403-0100